PIC16F871-E/L【PDF 137/143 页】IC MCU CMOS 20MHZ 2K FLSH 44PLCC

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2003 Microchip Technology Inc.

DS30569B-page 91

PIC16F870/871

11.3

RESET

The PIC16F870/871 differentiates between various

kinds of RESET:

Power-on Reset (POR)

MCLR Reset during normal operation

MCLR Reset during SLEEP

WDT Reset (during normal operation)

WDT Wake-up (during SLEEP)

Brown-out Reset (BOR)

Some registers are not affected in any RESET condi-

tion. Their status is unknown on POR and unchanged

in any other RESET. Most other registers are reset to a

“RESET state” on Power-on Reset (POR), on the

MCLR and WDT Reset, on MCLR Reset during

SLEEP, and Brown-out Reset (BOR). They are not

affected by a WDT Wake-up, which is viewed as the

resumption of normal operation. The TO and PD bits

are set or cleared differently in different RESET situa-

tions, as indicated in Table 11-4. These bits are used in

software to determine the nature of the RESET. See

Table 11-6 for a full description of RESET states of all

registers.

A simplified block diagram of the On-Chip Reset Circuit

is shown in Figure 11-4.

These devices have a MCLR noise filter in the MCLR

Reset path. The filter will detect and ignore small

pulses.

It should be noted that a WDT Reset does not drive

MCLR pin low.

FIGURE 11-4:

SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT

External

RESET

MCLR

VDD

OSC1

WDT

Module

VDD Rise

Detect

OST/PWRT

On-chip

RC OSC

WDT

Time-out

Power-on Reset

OST

10-bit Ripple Counter

PWRT

Chip_Reset

10-bit Ripple Counter

Reset

Enable OST

Enable PWRT

SLEEP

Note 1: This is a separate oscillator from the RC oscillator of the CLKI pin.

Brown-out

Reset

BOREN

(1)

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